DocumentCode
1220132
Title
Relaxing synchronization in distributed simulated annealing
Author
Hong, Chul-Eui ; McMillin, Bruce M.
Author_Institution
Electron. & Telecommun. Res. Inst., Taejon, South Korea
Volume
6
Issue
2
fYear
1995
fDate
2/1/1995 12:00:00 AM
Firstpage
189
Lastpage
195
Abstract
This paper presents a cost error measurement scheme and relaxed synchronization method, for simulated annealing on a distributed memory multicomputer, which predicts the amount of cost error that an algorithm will tolerate. An adaptive error control method is developed and implemented on an Intel iPSC/2
Keywords
distributed memory systems; error correction codes; parallel algorithms; simulated annealing; synchronisation; Intel iPSC/2; adaptive error control method; cost error measurement scheme; distributed memory multicomputer; distributed simulated annealing; relaxed synchronization method; synchronization; Adaptive control; Costs; Error correction; Parallel processing; Predictive models; Programmable control; Simulated annealing; Solid modeling; State-space methods; Temperature;
fLanguage
English
Journal_Title
Parallel and Distributed Systems, IEEE Transactions on
Publisher
ieee
ISSN
1045-9219
Type
jour
DOI
10.1109/71.342132
Filename
342132
Link To Document