Title :
VLSI architectures for convolver design using number theoretic transforms
Author_Institution :
Dept. of Electr. Eng., Imperial Coll. of Sci., Technol. & Med., London, UK
Abstract :
Efficient VLSI architectures are presented for implementing arithmetic operations modulo a Fermat number. An architecture for a digital convolution device based on these techniques is described.
Keywords :
VLSI; digital arithmetic; number theory; transforms; Fermat number modulo; Fermat number transform; VLSI architectures; convolver design; digital convolution device; implementing arithmetic operations; modulo Fermat number arithmetic; modulo addition; modulo multiplication; number theoretic transforms;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19891077
