• DocumentCode
    1221276
  • Title

    Correlation prefetching with a user-level memory thread

  • Author

    Solihin, Yan ; Lee, Jaejin ; Torrellas, Josep

  • Author_Institution
    Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
  • Volume
    14
  • Issue
    6
  • fYear
    2003
  • fDate
    6/1/2003 12:00:00 AM
  • Firstpage
    563
  • Lastpage
    580
  • Abstract
    This paper proposes using a user-level memory thread (ULMT) for correlation prefetching. In this approach, a user thread runs on a general-purpose processor in main memory, either in the memory controller chip or in a DRAM chip. The thread performs correlation prefetching in software, sending the prefetched data into the L2 cache of the main processor. This approach requires minimal hardware beyond the memory processor: The correlation table is a software data structure that resides in main memory, while the main processor only needs a few modifications to its L2 cache so that it can accept incoming prefetches. In addition, the approach has wide applicability, as it can effectively prefetch even for irregular applications. Finally, it is very flexible, as the prefetching algorithm can be customized by the user on an application basis. Our simulation results show that, through a new design of the correlation table and prefetching algorithm, our scheme delivers good results. Specifically, nine mostly-irregular applications show an average speedup of 1.32. Furthermore, our scheme works well in combination with a conventional processor-side sequential prefetcher, in which case the average speedup increases to 1.46. Finally, by exploiting the customization of the prefetching algorithm, we increase the average speedup to 1.53.
  • Keywords
    DRAM chips; memory architecture; storage management; DRAM chip; L2 cache; correlation prefetching; general-purpose processor; memory controller chip; prefetching algorithm; user-level memory thread; Algorithm design and analysis; Application software; Data structures; Engines; Graphics; Hardware; Prefetching; Proposals; Software performance; Yarn;
  • fLanguage
    English
  • Journal_Title
    Parallel and Distributed Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9219
  • Type

    jour

  • DOI
    10.1109/TPDS.2003.1206504
  • Filename
    1206504