DocumentCode :
1223765
Title :
Compact distributed RLC interconnect models - part III: transients in single and coupled lines with capacitive load termination
Author :
Venkatesan, Raguraman ; Davis, Jeffrey A. ; Meindl, James D.
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Volume :
50
Issue :
4
fYear :
2003
fDate :
4/1/2003 12:00:00 AM
Firstpage :
1081
Lastpage :
1093
Abstract :
For pt. II, see ibid., vol. 47, p. 2068-77 (2000). A new, complete physical model for the transient response of a high-speed global interconnect is rigorously derived. This work improves an earlier model by including a capacitive load termination to a distributed resistance-inductance capacitance (RLC) line, which more accurately models on-chip and off-chip high-speed global wires that drive large capacitive loads. In addition to key physical insight, the new transient expressions presented in this paper provide a quick and accurate estimation of interconnect time delay and crosstalk, which is necessary for rapid design space exploration for global wiring networks in future gigascale integration (GSI) systems.
Keywords :
ULSI; coupled transmission lines; crosstalk; integrated circuit interconnections; integrated circuit modelling; transients; capacitive load termination; capacitive loads; coupled lines; crosstalk; design space exploration; distributed RLC interconnect models; distributed resistance-inductance capacitance line; gigascale integration; high-speed global interconnect; interconnect time delay; physical model; transient expressions; transients; Capacitance; Circuit simulation; Crosstalk; Delay effects; Inductance; Integrated circuit interconnections; Power system transients; RLC circuits; Transient response; Transmission line theory;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2003.812507
Filename :
1206896
Link To Document :
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