DocumentCode
1224204
Title
Two-step channel selection technique by programmable digital-double quadrature sampling for complex low-IF receivers
Author
Mak, Pui-In ; Seng-Pan, U. ; Martins, R.P.
Author_Institution
Fac. of Sci. & Technol., Univ. of Macau, China
Volume
39
Issue
11
fYear
2003
fDate
5/29/2003 12:00:00 AM
Firstpage
825
Lastpage
827
Abstract
Presents a novel two-step channel selection technique to be adopted in complex low-IF receivers for enhancing the performance and efficiency of the front-end PLL-frequency synthesiser (PLL-FS), which will be mainly implemented by a proposed programmable digital-double quadrature sampling (D-DQS) scheme. Thus, the weaknesses of the PLL-FS in very small step-size operations including long locking time and large phase noise are significantly reduced. Simulation results of the D-DQS scheme are provided to demonstrated the feasibility of such a technique.
Keywords
channel allocation; digital phase locked loops; frequency synthesizers; phase noise; complex low-IF receivers; efficiency; front-end PLL-frequency synthesiser; locking time; phase noise; programmable digital-double quadrature sampling; two-step channel selection technique; very small step-size operations;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20030547
Filename
1207216
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