Single-Electron-Based Flexible Multivalued Exclusive-or Logic Gate

Author

Kim, Sang-Jin ; Lee, Chang-Keun ; Chung, Rae-Sik ; Park, Eun-Sil ; Shin, Seung-Jun ; Choi, Jung-Bum ; Yu, Yun-Seop ; Kim, Nam-Soo ; Lee, Hyung Gyoo ; Park, Keun-Hyung

Author_Institution

Dept. of Phys. & Res. Inst. for Nanosci. & Technol., Chungbuk Nat. Univ., Cheongju

Volume

56

Issue

5

fYear

2009

fDate

5/1/2009 12:00:00 AM

Firstpage

1048

Lastpage

1055

Abstract

By using two symmetrical sidewall gates, we implemented a Si-based single-electron exclusive- OR (XOR) gate and reported on the first flexible multivalued (MV) functionality. A grayscale contour plot of the output voltages displays alternating high/low values as a function of two single-electron transistor (SET) input voltages. Their voltage transfer characteristics display typical XOR or XNOR gate function depending on input voltages for binary, MV, and binary-MV mixed-modes. This flexible two-input XOR gate, combined with the previously reported NAND/NOR gates, provide three basic arithmetic blocks for the SET-based MV logic gate family.

Keywords

elemental semiconductors; logic gates; multivalued logic; single electron transistors; MV logic gate family; NAND/NOR gates; Si; XNOR gate function; XOR gate function; arithmetic blocks; exclusive-OR logic gate; flexible multivalued functionality; grayscale contour plot; single-electron transistors; symmetrical sidewall gates; voltage transfer characteristics; CMOS logic circuits; Displays; FETs; Gray-scale; Logic devices; Logic gates; Multivalued logic; Physics; Single electron transistors; Voltage; Coulomb blockade; Si-based single-electron transistor (SET); exclusive-OR (XOR) gate; multivalued (MV) logic;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2009.2016399

Filename

4810157