DocumentCode :
1224830
Title :
A flash ADC with reduced complexity
Author :
Balasubramanian, K.
Author_Institution :
Dept. of Electr. & Electron. Eng., Cukurova Univ., Adana, Turkey
Volume :
42
Issue :
1
fYear :
1995
fDate :
2/1/1995 12:00:00 AM
Firstpage :
106
Lastpage :
108
Abstract :
An architecture for a flash ADC, with reduced circuit complexity is proposed. The design of this ADC is module oriented; a k,n-bit ADC is developed by just cascading k number of n-b flash modules. Making use of the proposed design approach, high resolution converters of 24 b and 32 b could easily be implemented with the low resolution flash modules
Keywords :
analogue-digital conversion; circuit testing; network synthesis; 24 bit; 32 bit; architecture; cascading; circuit complexity; flash ADC; k,n-bit ADC; module oriented design; n-b flash modules; resolution; Circuits; Clocks; Complexity theory; Feeds; Hardware; Potentiometers; Signal processing; Signal resolution; Switches; Voltage control;
fLanguage :
English
Journal_Title :
Industrial Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0046
Type :
jour
DOI :
10.1109/41.345853
Filename :
345853
Link To Document :
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