Simulation study of trellis-coded transceivers for high-bit rate digital subscriber loops

Different transceiver structures for the proposed high-bit-rate (800 kbit/s) digital subscriber loop transmission interface are analysed. The simulation results presented demonstrate that high-bit-rate access with a considerable performance margin is feasible if baseband transceivers with appropriate equalisation and simple trellis coding are used. Initial results also indicate that more complicated bandpass transceivers with similar equalisation and trellis coding do not provide any clear performance advantage.<>