Title :
A Digital Envelope Modulator for a WLAN OFDM Polar Transmitter in 90 nm CMOS
Author :
Van Zeijl, Paul T M ; Collados, Manel
Author_Institution :
Philips Res., Eindhoven
Abstract :
A digital envelope modulator as part of a polar transmitter architecture for the 802.11a/g WLAN OFDM standards is investigated. The digital envelope modulator is quite similar to a state-of-the-art DAC design, but now it has been optimized to deal with envelope signals. A thermometer-coded envelope DAC has been implemented in a 90 nm digital CMOS process. Measurements of a test chip show the digital envelope modulator to reach an OFDM output power of 5 dBm for 54 Mb/s using 64 QAM at 2.45 GHz and fulfilling EVM specifications and in-band spectral mask requirements using just 12.7 mW from a 1.2 V supply. Combining the digital envelope modulator with an off-chip power amplifier gives an output power of 20.4 dBm, while fulfilling EVM specifications and in-band spectral mask requirements. The output power of the presented envelope DAC can be increased in a re-design by scaling device sizes. The envelope DAC is a key component in a software-defined-radio transmitter.
Keywords :
CMOS digital integrated circuits; OFDM modulation; UHF power amplifiers; digital-analogue conversion; radio transmitters; software radio; wireless LAN; DAC design; IEEE 802.11a/g; WLAN OFDM polar transmitter; digital CMOS process; digital envelope modulator; frequency 2.45 GHz; in-band spectral mask requirements; off-chip power amplifier; power 12.7 mW; size 90 nm; software defined radio transmitter; thermometer coded envelope; voltage 1.2 V; CMOS process; Design optimization; Digital modulation; OFDM modulation; Power amplifiers; Power generation; Power measurement; Signal design; Transmitters; Wireless LAN; CMOS; IEEE 802.11a; IEEE 802.11g; OFDM; RF transmitter; WLAN; digital transmitters; multi-standard; polar transmitter; software-defined radio; wireless;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2007.905239