DocumentCode
1225817
Title
An engineering model for short-channel MOS devices
Author
Toh, Kai-yap ; Ko, Ping-Keung ; Meyer, Robert G.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Volume
23
Issue
4
fYear
1988
Firstpage
950
Lastpage
958
Abstract
An engineering model for short-channel MOS devices which includes the effect of carrier drift velocity saturation is described. Based on a piecewise carrier drift velocity model, simplified expressions for the DC drain current I/sub D/, the small signal transconductance g/sub m/ and the output conductance g/sub ds/ in the saturation region are derived. For a given gate voltage, the expressions depend only on the threshold voltage V/sub T/ and the dimensions of the device, whose desired values are normally known.<>
Keywords
insulated gate field effect transistors; metal-insulator-semiconductor devices; semiconductor device models; DC drain current; carrier drift velocity saturation; engineering model; gate voltage; output conductance; piecewise carrier drift velocity model; saturation region; short-channel MOS devices; small signal transconductance; threshold voltage; Analytical models; Circuit optimization; Circuit simulation; Circuit synthesis; Electron mobility; MOS devices; Parameter extraction; Physics; Threshold voltage; Transconductance;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.346
Filename
346
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