Register File Power Reduction Using Bypass Sensitive Compiler

Author

Park, Sanghyun ; Shrivastava, Aviral ; Dutt, Nikil ; Nicolau, Alex ; Paek, Yunheung ; Earlie, Eugene

Author_Institution

Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul

Volume

27

Issue

6

fYear

2008

fDate

6/1/2008 12:00:00 AM

Firstpage

1155

Lastpage

1159

Abstract

This paper explores, develops, and investigates several bypass-sensitive compilation techniques to reduce the register file power by reducing the access frequency to the register file. We study the effectiveness of our techniques on the Intel XScale processor, which is based on the previously proposed ldquoon-demand register fetch readrdquo architectural feature. Furthermore, we show that our bypass-sensitive compilation technique is effective on various partial bypass configurations.

Keywords

microcomputers; power aware computing; program compilers; Intel XScale processor; bypass sensitive compiler; on-demand register fetch read; register file power reduction; Computer science; Energy consumption; Frequency; Information technology; Microprocessors; Microwave integrated circuits; Registers; Research and development; Resumes; Temperature; Bypass sensitive; compiler; forwarding paths; operation table; power consumption; register file;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/TCAD.2008.923254

Filename

4526748