Systematic design of programmable operational amplifiers with noise-power trade-off

A methodology for the systematic design of a programmable operational amplifier (opamp) is described. With this methodology, the opamp is programmable concerning noise and power consumption while keeping the stability for the whole operation range with a constant phase margin of phi_res=70deg. The theoretical model is developed with the help of the transfer characteristics of the opamp determining the degrees of freedom. Experimental results for a 0.35-mum CMOS opamp show either ultra low-noise of 2 nV/radicHz or low-power consumption of 140 muW while keeping the opamp stable over the whole range of programmability