Title :
Modelling and investigation of III-V compound semiconductor based HEMT´s for high performance applications
Author :
Subash, T.D. ; Gnanasekaran, T. ; Nirmal, D. ; Johnson, A.
Author_Institution :
Dept. of ECE Infant, Jesus Coll. of Eng. & Technol., Tuticorin, India
Abstract :
This paper investigates indium antimonide based quantum well field effect transistors with 40 nm physical gate length. Self consistent T-CAD simulations are used to study the high-speed potential of InSb field-effect transistors and its suitable for high speed, very low power logic applications. At the room temperature electron mobility in excess of 30,000 cm2/V-1s-1 in material with sheet carrier density typical of that employed in analogue transistors. 40nm gate length is used to obtain maximum drain current of 6.4e-4A/μm and the threshold voltage of the device is found to be -0.5V. The maximum drain current is found to be 6.4e-4 for the doping concentration of 1e+19. The OFF current of the device is found to be 2.642e-07A/μm when the gate voltage increases beyond 0.2V.
Keywords :
III-V semiconductors; carrier density; field effect transistors; high electron mobility transistors; indium compounds; logic devices; low-power electronics; quantum well devices; technology CAD (electronics); HEMT; III-V compound semiconductor; InSb; analogue transistors; device OFF current; device threshold voltage; doping concentration; high performance applications; high speed applications; low power logic applications; maximum drain current; physical gate length; quantum well field effect transistors; room temperature electron mobility; self consistent T-CAD simulations; sheet carrier density; size 40 nm; voltage -0.5 V; Electron mobility; Gallium arsenide; HEMTs; Logic gates; MODFETs; Silicon;
Conference_Titel :
Devices, Circuits and Systems (ICDCS), 2014 2nd International Conference on
Conference_Location :
Combiatore
DOI :
10.1109/ICDCSyst.2014.6926123