Title :
A 2.2-mW CMOS bandpass continuous-time multibit Δ-Σ ADC with 68 dB of dynamic range and 1-MHz bandwidth for wireless applications
Author :
Kappes, Michael S.
Author_Institution :
Broadcom Corp., San Diego, CA, USA
fDate :
7/1/2003 12:00:00 AM
Abstract :
A delta-sigma (ΔΣ) analog-to-digital converter featuring 68-dB dynamic range and 64-dB signal-to-noise ratio in a 1-MHz bandwidth centered at an intermediate frequency of 2 MHz with a 48-MHz sample rate is reported. A second-order continuous-time modulator employing 4-bit quantization is used to achieve this performance with 2.2 mW of power consumption from a 1.8-V supply. The modulator including references occupies 0.36 mm2 of die area and is implemented in a 0.18-μm five-metal single-poly digital CMOS process.
Keywords :
CMOS integrated circuits; circuit feedback; comparators (circuits); continuous time systems; delta-sigma modulation; quantisation (signal); 0.18 micron; 1 MHz; 1.8 V; 2 MHz; 2.2 mW; 4 bit; 48 MHz; analog-to-digital converter; bandpass continuous-time multibit Δ-Σ ADC; die area; dynamic range; intermediate frequency; power consumption; quantization; second-order continuous-time modulator; signal-to-noise ratio; single-poly digital CMOS process; wireless applications; Analog-digital conversion; Band pass filters; Bandwidth; CMOS process; Capacitors; Clocks; Digital signal processing; Dynamic range; Feedback; Sampling methods;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2003.813246
