A 85-dB dynamic range multibit delta-sigma ADC for ADSL-CO applications in 0.18-μm CMOS

Author

Gaggl, Richard ; Wiesbauer, Andreas ; Fritz, Gerhard ; Schranz, Christian ; Pessl, Peter

Author_Institution

Infineon Technol. Austria, Villach, Austria

Volume

38

Issue

7

fYear

2003

fDate

7/1/2003 12:00:00 AM

Firstpage

1105

Lastpage

1114

Abstract

A high-resolution multibit sigma-delta analog-to-digital converter (ADC) implemented in a 0.18-μm CMOS technology is introduced. The circuit is targeted for an asymmetrical digital subscriber line (ADSL) central-office (CO) application . An area- and power-efficient realization of a second-order single-loop 3-bit modulator with an oversampling ratio of 96 is presented. The ΣΔ modulator features an 85-dB dynamic range over a 300-kHz signal bandwidth. The measured power consumption of the ADC core is only 15 mW. An innovative biasing circuitry is introduced for the switched-capacitor integrators.

Keywords

CMOS integrated circuits; circuit feedback; delta-sigma modulation; digital subscriber lines; integrating circuits; switched capacitor networks; 0.18 micron; 15 mW; 3 bit; 300 kHz; ADSL-CO applications; CMOS; area-efficient realization; asymmetrical digital subscriber line; biasing circuitry; central-office application; dynamic range; multibit delta-sigma ADC; oversampling ratio; power consumption; power-efficient realization; second-order single-loop modulator; signal bandwidth; switched-capacitor integrators; Analog-digital conversion; Bandwidth; CMOS technology; DSL; Delta-sigma modulation; Dynamic range; Energy consumption; Integrated circuit measurements; Power measurement; Switching circuits;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2003.813216

Filename

1208458