Statistical significance of error-corrupted IC measurements

Author

Spanos, Costas J.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

Volume

2

Issue

1

fYear

1989

fDate

2/1/1989 12:00:00 AM

Firstpage

23

Lastpage

28

Abstract

The impact of measurement errors on the statistical significance of data collected from an IC manufacturing facility is discussed. On the assumption that the errors are not systematic, are normally distributed, and have known variances, estimators are introduced for the formal evaluation of this impact. These estimators can be used to calculate confidence intervals, to test equivalence hypotheses, and to predict the required sample size so that a desired level of confidence is maintained in the presence of these measurement errors. The aforementioned concepts are illustrated through an example in which critical decisions concerning the status of an NMOS process are based on error-corrupted measurements

Keywords

error statistics; integrated circuit manufacture; integrated circuit testing; measurement errors; statistical analysis; IC manufacturing facility; NMOS process; collected data; error statistics; error-corrupted IC measurements; estimators; measurement errors; statistical significance; Conductivity; Delay estimation; Fabrication; MOS devices; Measurement errors; Monitoring; Production facilities; Testing; Thickness measurement; Yield estimation;

fLanguage

English

Journal_Title

Semiconductor Manufacturing, IEEE Transactions on

Publisher

ieee

ISSN

0894-6507

Type

jour

DOI

10.1109/66.17000

Filename

17000