Title :
A variable precharge voltage sensing
Author :
Eirihata, T. ; Dhong, Sang H. ; Terman, Lewis M. ; Sunaga, Toshio ; Taira, Yoichi
Author_Institution :
East Fishkill Lab., IBM Corp., Hopewell Junction, NY, USA
fDate :
1/1/1995 12:00:00 AM
Abstract :
A new DRAM sensing approach that uses variable precharge voltage has been developed and analyzed in simulations. It uses a voltage swing only on the bit-line connected to the accessed cell. The bit-line precharge voltage varies from one RAS cycle to the next, depending on the level of the data in the accessed cell. The reference voltage for bit-line sensing is given by a new reference-cell control circuit without using a reference-voltage generator. The current required for sensing decreases as the precharge voltage increases, resulting in reduced power without any reduction of the sensing signal. Detailed analysis shows that the sensing current is only 2/3 of that in 1/2 TDD sensing, even in the worst case
Keywords :
CMOS memory circuits; DRAM chips; circuit analysis computing; reference circuits; CMOS technology; DRAM sensing; RAS cycle; bit-line precharge voltage; floating sensing voltage; power dissipation reduction; reference voltage; reference-cell control circuit; sensing current; simulations; variable precharge voltage sensing; voltage swing; Batteries; CMOS technology; Capacitance; Circuits; DH-HEMTs; Laboratories; Power dissipation; Random access memory; Signal to noise ratio; Voltage control;
Journal_Title :
Solid-State Circuits, IEEE Journal of