A 300 MHz digital double-sideband to single-sideband converter in 1 μm CMOS

Author

Hawley, Robert A. ; Lin, Thu-ji ; Samueli, Henry

Author_Institution

Integrated Circuits & Syst. Lab., California Univ., Los Angeles, CA, USA

Volume

30

Issue

1

fYear

1995

fDate

1/1/1995 12:00:00 AM

Firstpage

4

Lastpage

10

Abstract

A 43-tap FIR Hilbert transform digital filter chip is described which implements both a double-sideband (DSB) to single-sideband (SSB) conversion with a decimation-by-2 and the converse operation of a SSB to DSB conversion with an interpolation-by-2. Over 70 dB of image rejection is achieved by the Hilbert transform filter. The 3.57×7.07 mm², 45 000 transistor chip was fabricated in a 1 μm N-well CMOS process and operates at sample rates in excess of 300 MHz

Keywords

CMOS digital integrated circuits; FIR filters; Hilbert transforms; demodulation; digital filters; interpolation; sampled data filters; 1 micron; 300 MHz; FIR Hilbert transform digital filter; N-well CMOS process; decimation-by-2 implementation; double-sideband to single-sideband converter; image rejection; interpolation-by-2 implementation; receiver front-ends; sample rates; Amplitude modulation; Bandwidth; Baseband; Finite impulse response filter; Frequency conversion; Frequency response; Image converters; Sampling methods; Signal sampling; Throughput;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.350201

Filename

350201