Fast-transient susceptibility of a D-type flip-flop

Human electrostatic discharge (ESD) produces a transient current pulse with a very fast risetime, which can be a source of electromagnetic interference in digital devices. The focus of this paper is the radiated susceptibility of D-type flip-flops implemented in various CMOS and TTL logic technologies. A transient impulse was used to simulate the radiated field produced during an ESD event. A synchronized-disturbance testing methodology is developed that allows accurate control of the instant at which the disturbing signal is applied to the data input lines during an operational cycle of the circuit. The study reveals that these devices are susceptible only during certain time intervals during an operational cycle. The particular interval during which a flip-flop is susceptible is dependent on the logic state of the data input line, the implementation technology of the flip-flop, and the amplitude of the disturbing signal. The total width of the susceptibility intervals is a device parameter that can be used to determine the probability that the flip-flop will fail in the presence of random transient interference pulses