Title :
Impact of adaptive proactive reconfiguration technique on Vmin and lifetime of SRAM caches
Author :
Pouyan, Peyman ; Amat, Esteve ; Barajas, Enrique ; Rubio, Albert
Author_Institution :
Dept. of Electron. Eng., UPC Barcelona Tech, Barcelona, Spain
Abstract :
This work presents a test and measurement technique to monitor aging and process variation status of SRAM cells as an aging-aware design technique. We have then verified our technique with an implemented chip. The obtained aging information are utilized to guide our proactive strategies, and to track the impact of aging in new reconfiguration techniques for cache memory structures. Our proactive techniques improve the reliability, extend the SRAMs lifetime, and reduce the Vmin drift in presence of process variation and BTI aging.
Keywords :
SRAM chips; ageing; cache storage; integrated circuit design; integrated circuit reliability; BTI aging; SRAM caches; SRAM lifetime; adaptive proactive reconfiguration technique; aging monitoring; aging-aware design technique; cache memory structures; measurement technique; proactive strategy; process variation status; reliability; Aging; Cache memory; Monitoring; SRAM cells; Stress; Transistors; BTI; Process Variation; SRAM; Vmin; reconfiguration;
Conference_Titel :
Quality Electronic Design (ISQED), 2014 15th International Symposium on
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4799-3945-9
DOI :
10.1109/ISQED.2014.6783303
