InGaAsP channel HFET´s on InP for OEIC applications

A model for the calculation of the input noise of a high impedance photoreceiver is proposed, taking into account the contributions of low-frequency characteristics of the FET. Simulations based on this approach show that excess gate leakage current and low-frequency excess noise, usually observed in InGaAs channel FET´s, strongly penalize the photoreceiver sensitivity for low to medium data rates. New InGaAsP channel HFET´s have been developed and fabricated to solve those problems, dc measurements on 1×100 μm² gate HFET´s show good I_ds-V_ds characteristics with associated gate leakage currents lower than 200 nA. Promising ft of 18 GHz and f _max of 40 GHz have been recorded on 0.5×200 μm² gate transistors. Low-frequency gate and channel noise measurements demonstrate the suitability of InGaAsP channel HFET structure and technology for low noise applications. A hybrid pin-HFET high impedance photoreceiver has been assembled with a 1×150 μm ² gate transistor. A very close agreement is found between photoreceiver input noise predicted by our model and experimental results. Record sensitivities of 34.8 dBm at 622 Mbit/s and -28.7 dBm at 2.5 Gbit/s are inferred from noise measurements, confirming the strong potential of InGaAsP channel HFET´s for the fabrication of high sensitivity photoreceivers operating at moderate data rates