Title :
High-level modeling and design of asynchronous interface logic
Author :
Yakovlev, Alexandre V. ; Koelmans, Albert M. ; Lavagno, Luciano
Author_Institution :
Dept. of Comput. Sci., Newcastle upon Tyne Univ., UK
Abstract :
The authors´ new methodology uses formal models of concurrency to synthesize speed-independent circuit implementations from high-level, abstract behavioral specifications. This methodology offers the advantages of preserving behavioral semantics and better control flow abstraction. It also provides heuristics at a higher level of abstraction to help solve the complete state-coding problem
Keywords :
Petri nets; asynchronous circuits; formal specification; logic design; abstract behavioral specifications; asynchronous interface logic; behavioral semantics; formal models of concurrency; high-level modeling; speed-independent circuit implementations; state-coding problem; Circuit synthesis; Circuit testing; Clocks; Concurrent computing; Design methodology; Integrated circuit interconnections; Logic circuits; Logic design; Petri nets; Signal synthesis;
Journal_Title :
Design & Test of Computers, IEEE
