DocumentCode :
1230910
Title :
System partitioning of MCMs for low power
Author :
KHAN, SHOABA ; Madisetti, Vijay K.
Author_Institution :
Sch. of Electr. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Volume :
12
Issue :
1
fYear :
1995
Firstpage :
41
Lastpage :
52
Abstract :
Meeting the design challenges inherent in complex multichip modules that also reduce power dissipation is a daunting task, considering the number of constraints and the nonlinear cost functions explored early in the prototyping process. Current algorithms do not do the job. A new systematic approach combines commercial software with simple size-reduction and linearization methods that are largely unknown in the industry. The authors present results obtained from experiments with a set of large ICs
Keywords :
circuit analysis computing; multichip modules; software prototyping; design challenges; linearization methods; multichip modules; nonlinear cost functions; power dissipation; prototyping process; size-reduction; system partitioning; Algorithm design and analysis; Circuit testing; Costs; Packaging; Partitioning algorithms; Power dissipation; Prototypes; Routing; Software prototyping; Virtual prototyping;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.350690
Filename :
350690
Link To Document :
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