High speed primitives of hardware accelerators for DSP in GaAs technology

Author

Sarmiento, R. ; Carballo, P.P. ; Núnez, A.

Author_Institution

Centro de Microelectron. Aplicada, Univ de Las Palmas de Gran Canaria, Spain

Volume

139

Issue

2

fYear

1992

fDate

4/1/1992 12:00:00 AM

Firstpage

205

Lastpage

216

Abstract

The EUROCHIP initiative is providing foundry access and full support for a variety of technologies including CMOS and CBCMOS. However, no foundry runs have yet been selected for GaAs digital circuits. The authors hope that, in the future, EUROCHIP can support this technology. The paper describes work to design a set of basic computational primitives in digital signal processing (DSP) such as registers, adders and multipliers, and explores the influence of layout and design methodology on the performance of these cells. They have been developed using a design and buffering technique, and symbolic layout notation, well suited for robust design in GaAs DCFL logic. The results obtained so far show that they represent a good compromise between speed, area, and power for VLSI circuits

Keywords

III-V semiconductors; VLSI; adders; digital integrated circuits; field effect integrated circuits; gallium arsenide; multiplying circuits; shift registers; DCFL; DSP; EUROCHIP; GaAs digital circuits; GaAs technology; VLSI; adders; buffering technique; computational primitives; design methodology; digital signal processing; foundry access; hardware accelerators; multipliers; performance; registers; semiconductors; symbolic layout notation;

fLanguage

English

Journal_Title

Circuits, Devices and Systems, IEE Proceedings G

Publisher

iet

ISSN

0956-3768

Type

jour

Filename

139174