• DocumentCode
    123102
  • Title

    Linearly separable pattern classification using memristive crossbar circuits

  • Author

    Singh, Karam ; Sahu, Chitrakant ; Singh, Jaskirat

  • Author_Institution
    Dept. of ECE, IIITDM Jabalpur, Jabalpur, India
  • fYear
    2014
  • fDate
    3-5 March 2014
  • Firstpage
    323
  • Lastpage
    329
  • Abstract
    This paper presents a practical approach for the classification of linearly separable patterns using a single-layer perceptron network implemented with a memristive crossbar circuit (synaptic network) and a CMOS Op-Amps based neuron. Memristors (resistors with memory) promise the efficient implementation of synapses in artificial neural networks, as they bears astonishing resemblance to the biological synapses in its functionality, performance and integration capability. The proposed design of memristive perceptron is implemented in HSPICE and trained using the Matlab software by applying the perceptron learning rule. In order to analyze the performance of the proposed memristive crossbar circuit based perceptron design, a comparison is made with the existing MOS technology based synaptic network design. The simulation results thus obtained motivate the efficient implementation of sophisticated multi-layer neuromorphic systems with memristive crossbar circuits in the near future.
  • Keywords
    CMOS analogue integrated circuits; SPICE; learning (artificial intelligence); mathematics computing; memristors; operational amplifiers; pattern classification; perceptrons; CMOS op-amps based neuron; HSPICE; MOS technology based synaptic network design; Matlab software; artificial neural networks; biological synapses; integration capability; linearly separable pattern classification; memristive crossbar circuits; multilayer neuromorphic systems; perceptron design; perceptron learning rule; performance capability; single-layer perceptron network; synaptic network; Biological neural networks; CMOS integrated circuits; Logic gates; Memristors; Neurons; Threshold voltage; Training; CMOS neuron; Memristor; combinational logic; learning rule; linearly separable dataset; neural network; perceptron; synaptic weight;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design (ISQED), 2014 15th International Symposium on
  • Conference_Location
    Santa Clara, CA
  • Print_ISBN
    978-1-4799-3945-9
  • Type

    conf

  • DOI
    10.1109/ISQED.2014.6783343
  • Filename
    6783343