Algorithm/Architecture Co-Design of 3-D Spatio–Temporal Motion Estimation for Video Coding

Author

Gwo Giun Lee ; Ming-Jiun Wang ; He-Yuan Lin ; Drew Wei-Chi Su ; Bo-Yun Lin

Author_Institution

Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan

Volume

9

Issue

3

fYear

2007

fDate

4/1/2007 12:00:00 AM

Firstpage

455

Lastpage

465

Abstract

This paper presents a new spatio-temporal motion estimation algorithm and its VLSI architecture for video coding based on algorithm and architecture co-design methodology. The algorithm consists of the new strategies of spatio-temporal motion vector prediction, modified one-at-a-time search scheme, and multiple update paths derived from optimization theory. The hardware specification is for high-definition video coding. We applied the ME algorithm to H.264 reference software. Our algorithm surpasses recently published research and achieves close performance to full search. The VLSI implementation proves the low cost feature of our algorithm. The algorithm and architecture co-design concept is highly emphasized in this paper. We provide some quantitative example to show the necessity of algorithm and architecture co-design

Keywords

VLSI; code standards; hardware-software codesign; motion estimation; optimisation; spatiotemporal phenomena; video coding; 3-D spatio-temporal motion estimation; H.264 reference software; VLSI architecture; co-design methodology; optimization theory; video coding; Computer architecture; Costs; Hardware; Motion estimation; Rate-distortion; Redundancy; Software algorithms; Very large scale integration; Video coding; Video sequences; Algorithm and architecture co-design; VLSI architecture; motion estimation; spatio–temporal prediction;

fLanguage

English

Journal_Title

Multimedia, IEEE Transactions on

Publisher

ieee

ISSN

1520-9210

Type

jour

DOI

10.1109/TMM.2006.889355

Filename

4130371