DocumentCode
1231968
Title
A Digital Echo Suppressor for Satellite Circuits
Author
Fariello, E.
Author_Institution
Telespazio, Rome, Italy
Volume
20
Issue
6
fYear
1972
fDate
12/1/1972 12:00:00 AM
Firstpage
1176
Lastpage
1181
Abstract
An echo suppressor that is composed solely of digital logic circuits and based on a digital voice detector [1] has been designed. The unit is simple and requires no adjustment. Its basic application is to the SPADE [2] PCM channel, although it can be adapted to work with other systems. Results of initial subjective tests are included.
Keywords
Circuit testing; Communication switching; Delay effects; Detectors; Logic circuits; Phase change materials; Satellites; Signal design; Speech; Switches;
fLanguage
English
Journal_Title
Communications, IEEE Transactions on
Publisher
ieee
ISSN
0090-6778
Type
jour
DOI
10.1109/TCOM.1972.1091304
Filename
1091304
Link To Document