Design of HDTV subband filterbanks considering VLSI implementation constraints

The design of a subband filter bank for encoding high-definition television (HDTV) signals at 140 Mb/s is presented. Considering filter reconstruction errors, quantization errors, signal statistics, and VLSI implementation constraints in the filter design, quadrature mirror filters (QMFs) are found to be most appropriate. As a result, two-dimensional QMFs with 10 coefficients for vertical and 14 coefficients for horizontal filtering are proposed. A compact VLSI implementation is possible by filter architectures utilizing the special features of QMFs. The timing constraints can be relaxed by the use of polyphase filter structures for decimation and interpolation. Utilization of the symmetry property of QMFs reduces the arithmetic hardware expense approximately by a factor of two. By taking advantage of the special VLSI architecture and optimization of the circuit technique, a one-chip realization for each, the analysis and synthesis filter bank of the luminance components can be achieved in a 1-μm CMOS technology. A second pair of filter-bank chips is required for the two chrominance components