DocumentCode
1235131
Title
Additive bit-serial algorithm for discrete logarithm modulo 2k
Author
Fit-Florea, A. ; Matula, D.W. ; Thornton, M.A.
Author_Institution
Southern Methodist Univ., Dallas, TX, USA
Volume
41
Issue
2
fYear
2005
Firstpage
57
Lastpage
59
Abstract
A novel algorithm for computing the discrete logarithm modulo 2k that is suitable for fast software or hardware implementation is described. The chosen preferred implementation is based on a linear-time multiplier-less method and has a critical path of less than k modulo 2k shift-and-add operations.
Keywords
digital arithmetic; mathematics computing; additive bit serial algorithm; critical path; discrete logarithm modulo 2k; fast software implementation; hardware implementation; k modulo 2k shift operation; linear time multiplier less method; shift and add operations;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20056993
Filename
1393469
Link To Document