Title :
A VLSI architecture for fast inversion in GF(2m)
Author_Institution :
Shanghai Inst. of Comput. Technol., China
fDate :
10/1/1989 12:00:00 AM
Abstract :
A new algorithm for performing fast inversion in GF (2 m) is presented. The algorithm requires O[mlog2 m) computation time. Using serial-in-parallel-out multiplication, the design of the algorithm is highly regular, modular, and well suited for VLSI implementation
Keywords :
computational complexity; digital arithmetic; GF (2m); VLSI implementation; fast inversion; serial-in-parallel-out multiplication; Algorithm design and analysis; Computer architecture; Cryptography; Decoding; Error correction codes; Galois fields; Pipelines; Reed-Solomon codes; Signal processing algorithms; Very large scale integration;
Journal_Title :
Computers, IEEE Transactions on
