DocumentCode
1237130
Title
Design of a superconducting ALU with a 3-input XOR gate
Author
Takahashi, Kazuhiro ; Nagasawa, Shuichi ; Hasegawa, Haruhiro ; Miyahara, Kazunori ; Takai, Hiroshi ; Enomoto, Youichi
Author_Institution
Int. Supercond. Technol. Center, Supercond. Res. Lab., Tokyo, Japan
Volume
13
Issue
2
fYear
2003
fDate
6/1/2003 12:00:00 AM
Firstpage
551
Lastpage
554
Abstract
In order to develop superconducting Digital Signal Processors (DSP´s), we have been studying a superconducting 1-bit Arithmetic Logic Unit (ALU). This ALU has the simplest function of AND, OR, ADD (addition), and SUB (subtraction). The ALU operates in a 3-stage pipeline. All logic functions such as AND, OR, and SUM (summation) can be executed within a single stage of the pipeline. In order to achieve the high-speed operation of the ALU, we proposed and designed a novel 3-input XOR gate, which can operate in only one logic stage. Our simulation study showed that all components of the ALU can operate up to 50 GHz. These ALU components were fabricated and tested at low speed. Large bias margins of more than ±37% were achieved. The designed ALU´s were laid out and fabricated with an Nb process. The ALU occupied the area of 1200 μm × 2600 μm, which contains 560 Josephson junctions (JJ´s).
Keywords
adders; digital signal processing chips; high-speed integrated circuits; logic gates; niobium; pipeline processing; superconducting logic circuits; superconducting processor circuits; 1200 micron; 2600 micron; 3-input XOR gate; 50 GHz; Josephson junctions; Nb; Nb process; arithmetic logic unit; full adder; high-speed operation; superconducting ALU; superconducting DSP; three-stage pipeline; Digital arithmetic; Digital signal processing; Digital signal processors; Josephson junctions; Logic design; Logic functions; Niobium; Pipelines; Superconducting logic circuits; Testing;
fLanguage
English
Journal_Title
Applied Superconductivity, IEEE Transactions on
Publisher
ieee
ISSN
1051-8223
Type
jour
DOI
10.1109/TASC.2003.813944
Filename
1211662
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