A Hybrid Realization for Sampled-Data Controllers

This paper presents a method for realizing sampled-data compensators for discrete control systems. A canonical representation that requires a minimum number of delay elements is selected for the realization of sampled-data compensation functions. A hybrid implementation of this canonical form is presented that uses analog elements for multiplication and summation, and digital elements for storage (time delay). The hybrid controller is programmed to compensate two sampled-data systems. For one system (an accelerometer control loop), open-loop frequency characteristics of the hybrid controller are displayed along with time domain curves of the closed-loop system performance.