Title :
Characterization of Neutron- and Alpha-Particle-Induced Transients Leading to Soft Errors in 90-nm CMOS Technology
Author :
Narasimham, Balaji ; Gadlage, Matthew J. ; Bhuva, Bharat L. ; Schrimpf, Ronald D. ; Massengill, Lloyd W. ; Holman, W. Timothy ; Witulski, Arthur F. ; Reed, Robert A. ; Weller, Robert A. ; Zhu, Xiaowei
Author_Institution :
Vanderbilt Univ., Nashville, TN
fDate :
6/1/2009 12:00:00 AM
Abstract :
Combinational logic soft errors are a major environment-related reliability issue in advanced CMOS processes. The key to determining logic soft error rates (SERs) is detailed knowledge of neutron- and alpha-particle-induced single-event transient (SET) pulsewidths, but these pulsewidths are difficult to measure directly. Experimental results obtained using a novel test chip fabricated in a 90-nm CMOS technology indicate that the SET widths induced by these particles are similar to those of legitimate logic signals. The logic failure-in-time (FIT) rates, computed based on experimental SET cross sections, correspond with previous simulation-based projections of FIT rates and indicate that logic SER may be an issue for some terrestrial applications. Monte Carlo-based simulations are used to verify experimental cross sections and to project scaling of neutron and alpha SET cross sections. These results indicate that alpha-particle-induced SET cross sections scale more rapidly than neutron SET cross sections.
Keywords :
CMOS logic circuits; Monte Carlo methods; combinational circuits; integrated circuit reliability; integrated circuit testing; radiation hardening (electronics); CMOS technology; Monte Carlo-based simulations; alpha-particle-induced transients; combinational logic soft errors; integrated circuit testing; legitimate logic signals; logic failure-in-time rates; neutron-particle-induced transients; reliability; size 90 nm; Alpha; failure in time (FIT); neutron; pulsewidth; single event; single-event transient (SET); soft error; soft error rate (SER);
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
DOI :
10.1109/TDMR.2009.2020912