An SNS technology process for ramp junction based digital superconducting circuits

The SNS (Nb/HfTi/Nb) ramp junction technology process has been improved for digital superconducting circuit operation. DC interferometers were realized on an isolated superconducting ground plane, connections being realized through windows in the insulation layers. The inductances of superconducting Nb striplines (widths w down to the sub-μm range) were measured. For a 250 nm SiO₂/Nb-oxide insulation layer, the sheet inductances of striplines were determined at 0.382 ± 0.009, 0.340 ± 0.005, and 0.293 ± 0.008 pH (stripline widths: 1.5, 1.0, 0.54 μm) and compared with data calculated by different inductance evaluation programs. The Josephson junctions used in the interferometers exhibit a critical current density of j_C=525 kA/cm² and a characteristic voltage of V_C=95 μV. The design of an RSFQ converter circuit was developed on the basis of SNS ramp junction technology. For circuit applications the critical current density j_C was set to 150 kA/cm².