Abstract :
A CMOS analogue circuit is proposed that computes the sum of two voltages. The circuit is self-biased, only requires a small number of transistors, and offers good accuracy over a wide range of input values. The design makes no special demands on device aspect ratios and could offer an economic alternative to conventional approaches. Simulation results have shown that total harmonic distortion (THD) is lower than -40 dB for output voltages up to 4 V peak to peak
