Title :
Graphical analysis of contact resistance
Author :
Adlerstein, M.G.
Author_Institution :
Res. Div., Raytheon Co., Lexington, MA
fDate :
2/2/1995 12:00:00 AM
Abstract :
Low contact resistance is a recognised advantage for high performance semiconductor devices. This translates to requirements for semiconductor layers with low sheet resistivity and metallisations with low specific contact resistance. The present a graphical interpretation of the importance of these requirements and illustrate the analysis for various semiconductor materials
Keywords :
contact resistance; semiconductor device metallisation; semiconductor devices; semiconductor-metal boundaries; contact resistance; graphical analysis; metallisation; semiconductor devices;
Journal_Title :
Electronics Letters
