DocumentCode :
1239431
Title :
An FPGA Implementation of MML-DFE for Spatially Multiplexed MIMO Systems
Author :
Yu, Sungwook ; Im, Tae Ho ; Park, Chang Hwan ; Kim, Jaekwon ; Cho, Yong Soo
Author_Institution :
Electr. & Electron. Eng. Dept., Chung-Ang Univ., Seoul
Volume :
55
Issue :
7
fYear :
2008
fDate :
7/1/2008 12:00:00 AM
Firstpage :
705
Lastpage :
709
Abstract :
Although the maximum-likelihood decision-feedback equalization (ML-DFE) detection method for multi-input multi- output (MIMO) system leads to a good compromise between the performance and the complexity, the computational complexity of the ML part in the ML-DFE is still large. This paper describes a modified maximum-likelihood (MML) algorithm, which reduces the computational complexity of the original ML algorithm significantly without degrading the performance. Then, based on the MML algorithm, we propose the MML-DFE, which has the same performance as the ML-DFE but has much lower complexity. Both the ML-DFE block and MML-DFE block for 4times4 MIMO system have been implemented in field-programmable gate array to verify the functional correctness and the complexity advantage.
Keywords :
MIMO communication; computational complexity; decision feedback equalisers; field programmable gate arrays; maximum likelihood estimation; multiplexing; MIMO systems; computational complexity; field-programmable gate array; functional correctness; modified maximum likelihood-decision feedback optimization; modified maximum-likelihood algorithm; spatial multiplexing; Decision–feedback equalization (DFE); maximum-likelihood (ML) detection; multi-input multi-output (MIMO);
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2008.921572
Filename :
4536900
Link To Document :
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