DocumentCode
123961
Title
Improving Coverage of Simulation-Based Verification by Dedicated Stimuli Generation
Author
Shuo Yang ; Wille, Robert ; Drechsler, Rolf
Author_Institution
Inst. of Comput. Sci., Univ. of Bremen, Bremen, Germany
fYear
2014
fDate
27-29 Aug. 2014
Firstpage
599
Lastpage
606
Abstract
Simulation-based verification is still the most frequently used technique when complex designs are to be verified. Stimuli are thereby generated and applied in order to sufficiently trigger and, by this, verify a set of considered scenarios. In general, a scenario can be triggered in various fashions. To ensure a high verification quality, each of these fashions should adequately be covered. However, to the best of our knowledge, this has not appropriately been addressed thus far, i.e. existing stimuli generation is mainly performed without an explicit consideration of the possible fashions in which a scenario might be triggered. To improve this, three approaches are proposed in this work. While examples illustrate their advantages, a case study confirms that, using the proposed approaches, very compact sets of stimuli satisfying this coverage requirement can efficiently be generated.
Keywords
Boolean functions; computability; formal verification; set theory; Boolean satisfiability; DUV; design under verification; simulation-based verification coverage; stimuli generation; stimuli sets; Complexity theory; Computational efficiency; Generators; Logic gates; Search problems; Silicon; System-on-chip; Coverage; Hardware Design; Stimuli Generation; Verification;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design (DSD), 2014 17th Euromicro Conference on
Conference_Location
Verona
Type
conf
DOI
10.1109/DSD.2014.100
Filename
6927296
Link To Document