DocumentCode
123971
Title
Towards Exploring Vast MPSoC Mapping Design Spaces Using a Bias-Elitist Evolutionary Approach
Author
Wei Quan ; Pimentel, Andy D.
Author_Institution
Inf. Inst., Univ. of Amsterdam, Amsterdam, Netherlands
fYear
2014
fDate
27-29 Aug. 2014
Firstpage
655
Lastpage
658
Abstract
The problem of optimally mapping a set of tasks onto a set of given heterogeneous processors for maximal throughput has been known, in general, to be NP-complete. Previous research has shown that Genetic Algorithms (GA) typically are a good choice to solve this problem when the solution space is relatively small. However, when the size of the problem space increases, classic genetic algorithms still suffer from the problem of long evolution times. To address this problem, this paper proposes a novel bias-elitist genetic algorithm that is guided by domain-specific heuristics to speed up the evolution process. Experimental results reveal that our proposed algorithm is able to handle large scale task mapping problems and produces high-quality mapping solutions in only a short time period.
Keywords
genetic algorithms; microprocessor chips; system-on-chip; MPSoC mapping design space; NP-complete; bias-elitist GA; bias-elitist evolutionary approach; domain-specific heuristic; evolution process; genetic algorithm; heterogeneous processor; high-quality mapping solution; large scale task mapping problem; maximal throughput; multiprocessor system-on-chip; Biological cells; Computer architecture; Genetic algorithms; Heuristic algorithms; Program processors; Sociology; Statistics;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design (DSD), 2014 17th Euromicro Conference on
Conference_Location
Verona
Type
conf
DOI
10.1109/DSD.2014.46
Filename
6927306
Link To Document