DocumentCode :
1239758
Title :
Utilization of on-line (concurrent) checkers during built-in self-test and vice versa
Author :
Gupta, Sandeep K. ; Pradhan, Dhiraj K.
Author_Institution :
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
Volume :
45
Issue :
1
fYear :
1996
fDate :
1/1/1996 12:00:00 AM
Firstpage :
63
Lastpage :
73
Abstract :
Concurrent checkers are commonly used in computer systems to detect computational errors on-line, which enhances reliability. Using the coding theory framework developed earlier by the authors, it is shown in the following that concurrent checkers, already available within the circuit, can be utilized very effectively during off-line testing. Specifically, test time as well as fault escape probability can both be reduced simultaneously. The proposed combined scheme can be implemented with simple modification of existing hardware. Also shown is a novel use of BIST hardware for concurrent checking. Specifically proposed is a novel, dual use of concurrent checkers and built-in self-test hardware, yielding mutual advantage
Keywords :
built-in self test; error correction codes; error detection codes; logic testing; BIST; built-in self-test; computational errors; concurrent checkers; fault escape probability; off-line testing; reliability; test time; Availability; Built-in self-test; Circuit faults; Circuit testing; Codes; Concurrent computing; DH-HEMTs; Design methodology; Hardware; Very large scale integration;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.481487
Filename :
481487
Link To Document :
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