Title :
Minimizing Reversible Circuits in the 2n Scheme Using Two and Three Bits Patterns
Author :
Lukac, Martin ; Hawash, Maher ; Kameyama, Michitaka ; Perkowski, Marek ; Kerntopf, Pawel
Author_Institution :
Grad. Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan
Abstract :
In this paper we present improvements to the cost of quantum circuits implemented with 2n-lines circuit implementation. The 2n-line circuit implementation is intended for the linear nearest neighbor quantum circuits and implements any quantum circuits in such manner that they can be directly mapped to quantum implementations. In this paper we propose a replacement strategy for 2- and 3-qubit patterns detected on the control lines. It is demonstrated that application of this strategy leads to a considerable reduction of circuit cost.
Keywords :
logic circuits; logic design; quantum computing; 2-qubit patterns; 2n-lines circuit implementation; 3-qubit patterns; linear nearest neighbor quantum circuits; reversible logic circuits; Algorithm design and analysis; Computers; Educational institutions; Logic gates; Minimization; Pattern matching; Quantum computing;
Conference_Titel :
Digital System Design (DSD), 2014 17th Euromicro Conference on
Conference_Location :
Verona
DOI :
10.1109/DSD.2014.106