DocumentCode :
123994
Title :
A combination of multi-edge coding and independent coding lines for time-to-digital conversion
Author :
Sondej, Dominik ; Szplet, Ryszard
Author_Institution :
Mil. Univ. of Technol., Warsaw, Poland
fYear :
2014
fDate :
2-4 Sept. 2014
Firstpage :
1
Lastpage :
2
Abstract :
The paper describes a new method for time-to-digital conversion that allows achieving the conversion resolution far below the propagation time of the fastest delay buffer in integrated circuit (IC). The method is a combination of the multi-edge time coding and time digitization in independent coding lines. The implementation of such combination and assessment of its effectiveness are the main aims of this research. The article also describes the main design issues that were solved during the implementation of method in an FPGA device. They include: the generation of a pattern square signal with a certain amount of edges and possibly minimal delays between them, the elimination of bubble errors and reduction of internal interferences in IC.
Keywords :
buffer circuits; delay circuits; encoding; field programmable gate arrays; integrated circuit design; interference suppression; signal generators; time-digital conversion; FPGA device; IC; bubble error; delay buffer; independent coding line; integrated circuit; internal interference reduction; multiedge time coding line; pattern square signal generation; time digitization; time-to-digital conversion; Delay lines; Delays; Encoding; Field programmable gate arrays; Signal resolution; independent coding lines; multi-edge coding; time counter; time-to-digital conversion;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2014 24th International Conference on
Conference_Location :
Munich
Type :
conf
DOI :
10.1109/FPL.2014.6927382
Filename :
6927382
Link To Document :
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