Multi-FPGA reconfigurable system for accelerating MATLAB simulations

The use of reconfigurable FPGA devices to support the execution of computationally intensive software tasks is discussed in this paper. A system architecture consisting of multiple serially-connected FPGAs is developed, where each FPGA holds a pool of reconfigurable regions. An accelerator can be reconfigured into a region, replaced or discarded at runtime. Configurable connection blocks are responsible of directing data between any two accelerators. The whole system is connected via PCIe-interface to a host PC, where a middleware layer hides all hardware management operations, e.g. routing the data sent among the accelerators, and provides the end-user with an API to use the whole system. Recently, the very fast interfaces for reconfiguring parts of the used FPGAs minimize the overhead caused for hardware modifications. In addition, a manual design of hardware accelerators is not more needed with the continuously improving quality of high-level synthesis tools. In this paper, we considered the case where our system is used within MATLAB. We build a small library to compare and improve upon the execution times of some often used functions.