DocumentCode :
124053
Title :
High level programming framework for FPGAs in the data center
Author :
Segal, Oren ; Margala, Martin ; Chalamalasetti, Sai Rahul ; Wright, Matthew
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Massachusetts Lowell, Lowell, MA, USA
fYear :
2014
fDate :
2-4 Sept. 2014
Firstpage :
1
Lastpage :
4
Abstract :
Heterogeneous computing offers a promising solution for energy efficient computing in the data center. FPGA based heterogeneous computing is an especially promising direction since it allows for the creation of custom hardware solutions for data centric parallel applications. One of the main issues delaying wide spread adoption of FPGAs as main stream high performance computing devices is the difficulty in programming them. OpenCL was meant to address the difficulties and the non-uniformity related to programming heterogeneous devices, unfortunately because of its complexity it sets the bar high for many software programmers, preventing them from directly benefiting from the computing power and energy efficiency that OpenCL and heterogeneous computing have to offer. This work presents an effort to bridge the gap by extending an existing Java programming framework (APARAPI), based on OpenCL, so that it can be used to program FPGAs at a high level of abstraction and increased ease of programmability. We run several real world algorithms to assess the performance of the APARAPI framework on both a low end and a high end system. On the low end and high and systems respectively we find up to 78-80 percent power reduction and 4.8X-5.3X speed increase running NBody simulation, as well as up to 65-80 percent power reduction and 6.2X-7X speed increase for a K-Means MapReduce algorithm running on top of the Hadoop framework and APARAPI.
Keywords :
Java; computer centres; field programmable gate arrays; parallel programming; power aware computing; APARAPI framework; FPGAs; Hadoop framework; Java programming framework; K-means MapReduce algorithm; NBody simulation; OpenCL; data center; data centric parallel applications; energy efficient computing; heterogeneous computing; heterogeneous devices; high level programming framework; high performance computing devices; power reduction; Algorithm design and analysis; Computer architecture; Field programmable gate arrays; Java; Kernel; Programming; APARAPI; FPGA; Framework; Java; OpenCL; Programming;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2014 24th International Conference on
Conference_Location :
Munich
Type :
conf
DOI :
10.1109/FPL.2014.6927442
Filename :
6927442
Link To Document :
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