DocumentCode
124066
Title
Evolutionary on-line synthesis of hardware accelerators for software modules in reconfigurable embedded systems
Author
Dobai, Roland
Author_Institution
Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic
fYear
2014
fDate
2-4 Sept. 2014
Firstpage
1
Lastpage
6
Abstract
High-level synthesis ensures that a program code written in a programming language can be easily transferred into a hardware description language and thereby makes the design process faster and less demanding. However, professional synthesis tools are very complex and not well suited for deployment in embedded systems with limited resources. Evolutionary on-line synthesis is proposed in this paper which represents a new way to exploit evolutionary design. The program code is deployed into the processor of a reconfigurable embedded platform and the evolutionary design framework into its programmable logic. The functionality is transferred from software into hardware on-line, during runtime. The proposed approach serves essentially the same purpose as high-level synthesis but the synthesis can be performed by a simple embedded computational platform and on-line. The approach can offer higher flexibility in contrast with similar conventional approaches because it can develop solutions for unexpected situations. The proposed approach has the advantage over previous evolutionary design systems because no separated training phase is required and the software-based (correct) implementation is always available which can be exploited for monitoring and re-evolving the solution if this is necessary. The proposed evolutionary on-line synthesis was evaluated on the problem of image filter design. The achieved results indicate that the automated on-line synthesis based on evolution is possible and it can provide even better results than conventional implementations in specific application domains.
Keywords
embedded systems; evolutionary computation; hardware description languages; high level synthesis; programmable logic devices; evolutionary design; evolutionary on-line synthesis; hardware accelerators; hardware description language; high-level synthesis; image filter design; programmable logic; programming language; reconfigurable embedded systems; software modules; software-based implementation; specific application domains; Embedded systems; Hardware; Noise; Random access memory; Training; Training data;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications (FPL), 2014 24th International Conference on
Conference_Location
Munich
Type
conf
DOI
10.1109/FPL.2014.6927455
Filename
6927455
Link To Document