DocumentCode
124104
Title
A novel modular adder for one thousand bits and more using fast carry chains of modern FPGAs
Author
Rogawski, Marcin ; Homsirikamol, Ekawat ; Gaj, Kris
Author_Institution
Volgenau Sch. of Eng., George Mason Univ., Fairfax, VA, USA
fYear
2014
fDate
2-4 Sept. 2014
Firstpage
1
Lastpage
8
Abstract
In this paper a novel, low-latency family of high-radix Parallel Prefix Network adders and modular adders has been proposed. This family efficiently takes advantage of fast carry chains of modern FPGAs. The implementation results reveal that these adders have great potential for efficient implementation of modular addition with the long integers used in various public key cryptography schemes.
Keywords
adders; carry logic; field programmable gate arrays; logic design; public key cryptography; FPGA; fast carry chains; field programmable gate arrays; high-radix parallel prefix network adders; low-latency family; modular adder; public key cryptography schemes; Adders; Delays; Field programmable gate arrays; Global Positioning System; Optimization; Table lookup; Brent-Kung; FPGA; Kogge-Stone; parallel prefix network; ripple carry adder;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications (FPL), 2014 24th International Conference on
Conference_Location
Munich
Type
conf
DOI
10.1109/FPL.2014.6927493
Filename
6927493
Link To Document