Title :
An efficient heuristic procedure for solving the state assignment problem for event-based specifications
Author :
Lavagno, Luciano ; Moon, Cho W. ; Brayton, Robert K. ; Sangiovanni-Vincentelli, Alberto L.
Author_Institution :
Dipartimento di Elettronica, Politecnico di Torino, Italy
fDate :
1/1/1995 12:00:00 AM
Abstract :
We propose a novel framework to solve the state assignment problem arising from the signal transition graph (STG) representation of an asynchronous circuit. We first establish a relation between STG´s and finite state machines (FSM´s). Then we solve the STG state assignment problem by minimizing the number of states in the corresponding FSM and by using a critical race-free state assignment technique. State signal transitions may be added to the original STG. A lower bound on the number of signals necessary to implement the STG is given. Our technique significantly increases the STG applicability as a specification for asynchronous circuits
Keywords :
Petri nets; asynchronous circuits; circuit CAD; finite state machines; logic CAD; minimisation of switching nets; state assignment; FSM; asynchronous circuit; critical race-free technique; event-based specifications; finite state machines; heuristic procedure; signal transition graph; state assignment problem; state signal transitions; Asynchronous circuits; Automata; Clocks; Control systems; Design automation; Hazards; Minimization; Moon; Process design; Throughput;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on