Reduction of threshold voltage sensitivity in SOI MOSFET´s

Author

Sherony, Melanie J. ; Su, Lisa T. ; Chung, James E. ; Antoniadis, Dimitri A.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA

Volume

16

Issue

3

fYear

1995

fDate

3/1/1995 12:00:00 AM

Firstpage

100

Lastpage

102

Abstract

The threshold voltage sensitivity, of fully depleted SOI MOSFET´s to variations in SOI silicon film thickness was examined through both simulation and device experiments. The concept of designing the channel V/sub th/ implant to achieve a constant dose within the film, rather than a constant doping concentration, was studied for a given range of film thicknesses. Minimizing the variation in retained dose reduced the threshold voltage sensitivity to film thickness for the range of t/sub si/ examined. One-dimensional process simulations were performed to determine the optimal channel implant condition that would reduce the variation in retained dose using realistic process parameters for both NMOS and PMOS device processes. SOI NMOS transistors were fabricated. The experimental results confirmed the simulation findings and achieved a reduced threshold voltage sensitivity.<>

Keywords

MOSFET; doping profiles; ion implantation; semiconductor process modelling; sensitivity; silicon-on-insulator; simulation; NMOS device processes; NMOSFETs; PMOS device processes; SOI MOSFET; SOI silicon film thickness; Si:B-SiO/sub 2/; channel implant; constant dose; device experiment; fully depleted SOI; optimal channel implant condition; simulation; threshold voltage sensitivity; voltage sensitivity reduction; Doping; Implants; MOS devices; MOSFET circuits; Manufacturing; Semiconductor films; Silicon; Substrates; Thickness control; Threshold voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.363235

Filename

363235