DocumentCode :
1241630
Title :
Analysis and Implementation of a 0.9-V Voltage-Controlled Oscillator With Low Phase Noise and Low Power Dissipation
Author :
Lee, Shuenn-Yuh ; Hsieh, Jian-Yu
Author_Institution :
Dept. of Electr. Eng., Nat. Chung- Cheng Univ., Minsyong
Volume :
55
Issue :
7
fYear :
2008
fDate :
7/1/2008 12:00:00 AM
Firstpage :
624
Lastpage :
627
Abstract :
A voltage-controlled oscillator (VCO) with low phase noise and low power dissipation for IEEE 802.11b is proposed. A negative resistance multiple-gated circuit with a bypass capacitor is adopted to improve phase noise. The chip is implemented in 0.18-mum CMOS process under a supply voltage of 0.9 V and power consumption of 2.7 mW. Its measured results show that the VCO has a phase noise of -122.3 dBc/Hz at 1-MHz offset frequency from the carrier frequency, and the tuning frequency from 2.17 to 2.73 GHz can be obtained under the tuning voltage of -0.9 to 0.9 V. The theoretical analysis and design consideration are also conducted in detail to show the benefits of the proposed VCO.
Keywords :
CMOS digital integrated circuits; negative resistance circuits; phase noise; power capacitors; power consumption; tuning; voltage-controlled oscillators; CMOS process; bypass capacitor; carrier frequency; frequency 1 MHz; frequency 2.17 GHz to 2.73 GHz; low-phase noise; low-power dissipation; negative resistance multiple-gated circuit; power 2.7 mW; power consumption; size 0.18 mum; tuning frequency; voltage -0.9 V to 0.9 V; voltage-controlled oscillator; Low phase noise; low power; negative resistance multiple-gate circuit (NRMGC); voltage-controlled oscillator (VCO);
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2008.921574
Filename :
4538246
Link To Document :
بازگشت