• DocumentCode
    1242144
  • Title

    SEChecker: A Sequential Equivalence Checking Framework Based on {K} th Invariants

  • Author

    Lu, Feng ; Cheng, Kwang-Ting

  • Author_Institution
    Cadence Design Syst., Fremont, CA
  • Volume
    17
  • Issue
    6
  • fYear
    2009
  • fDate
    6/1/2009 12:00:00 AM
  • Firstpage
    733
  • Lastpage
    746
  • Abstract
    In recent years, considerable research efforts have been devoted to utilizing circuit structural information to improve the efficiency of Boolean satisfiability (SAT) solving, resulting in several efficient circuit-based SAT solvers. In this paper, we present a sequential equivalence checking framework based on a number of circuit-based SAT solving techniques as well as a novel invariant checker. We first introduce the notion of kth invariants. In contrast to the traditional invariants that hold for all cycles, k th invariants are guaranteed to hold only after the kth cycle from the initial state. We then present a bounded model checker (BMChecker) and an invariant checker (IChecker), both of which are based on circuit SAT techniques. Jointly, BMChecker and IChecker are used to compute the kth invariants, and are further integrated in a sequential circuit SAT solver for checking sequential equivalence. Experimental results demonstrate that the new sequential equivalence checking framework can efficiently verify large industrial designs that cannot be verified by existing solutions.
  • Keywords
    Boolean functions; formal verification; optimisation; sequential estimation; Boolean satisfiability; bounded model checker; circuit-based SAT solving techniques; invariant checker; kth invariants; sequential equivalence checking framework; Formal verification; invariant; sequential equivalence checking;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2008.2005311
  • Filename
    4815387